Increasing VGS decreases EB EB EF ~ EC y 0 Lī S D + - +++ VGS1>Vt +++ metal oxide p n+ - n+ Triode Region A voltage-controlled resistor VDS ID increasing VGS B S D - + +++ VGS2>VGS1 +++ +++ G metal oxide p n+ n+ - VDS cut-off B 0.1 v S D + - +++ VGS3>VGS2 +++ +++ Increasing VGS puts more charge in the channel, allowing more drain current to flow +++ metal oxide p n+ - n+ Gate G body B source S drain D + - n++ oxide p n+ n+ W L Flatbands! For this choice of materials, VGS VTn+-n-n+ structure  inversionĬhannel Charge (Qch) VGS>VT Depletion region charge (QB) is due to uncovered acceptor ions Qch Gate: metal or heavily doped poly-Si G body B source S drain D metal oxide p n+ n+ W L Structure: n-channel MOSFET(NMOS) IG=0 (bulk or substrate) ID=IS y IS xĭ G B (IB=0, should be reverse biased) S Circuit Symbol (NMOS)enhancement-type: no channel at zero gate voltage ID= IS IG= 0 G-Gate D-Drain S-Source B-Substrate or Body ISĮnergy bands (“flat band” condition not equilibrium) (equilibrium) HFET, MESFET, JFET, DRAM, CCD (Some in Sup.MOSFET Scaling and Current Topics (Literature + Sup.Introduction toMetal-Oxide-SemiconductorField Effect Transistors(MOSFETs)Chapter 7, Anderson and Anderson

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